Circuit Design for Reliability | EKB DL

Home BookCircuit Design for Reliability

Circuit Design for Reliability

Circuit Design for Reliability

Description

This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.

Keywords

Technology & EngineeringElectronicsCircuitsQuality ControlComputersDesign, Graphics & MediaCAD-CAMElectrical

2014Book

Author(s)Ricardo Reis, Yu Cao, Gilson Wirth

PublisherSpringer New York

ISBN9781461440772

LanguageEnglish

SpringerLink Book

Similar Books

Analog IC Reliability in Nanometer CMOS

Analog IC Reliability in Nanometer CMOS

Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures

Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures

ESD Protection Device and Circuit Design for Advanced CMOS Technologies

ESD Protection Device and Circuit Design for Advanced CMOS Technologies

CMOS RF Circuit Design for Reliability and Variability

CMOS RF Circuit Design for Reliability and Variability

High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip

High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip

Analysis and Design of Resilient VLSI Circuits Mitigating Soft Errors and Process Variations

Analysis and Design of Resilient VLSI Circuits Mitigating Soft Errors and Process Variations

Modeling of Electrical Overstress in Integrated Circuits

Modeling of Electrical Overstress in Integrated Circuits

Nanoscale Memory Repair

Nanoscale Memory Repair

Soft Error Mechanisms, Modeling and Mitigation

Soft Error Mechanisms, Modeling and Mitigation

Timing Performance of Nanometer Digital Circuits Under Process Variations

Timing Performance of Nanometer Digital Circuits Under Process Variations