Trace Theory and VLSI Design
Formal Semantics and Proof Techniques for Optimizing VHDL Models
Asynchronous Circuits
Formal Semantics for VHDL (The Springer International Series in Engineering and Computer Science, 307)
Higher-Level Hardware Synthesis
Algebraic Semantics (Lecture Notes in Computer Science, 99)
A Formal Approach to Hardware Design
A Survey of High-Level Synthesis Systems
High Level Synthesis of ASICs under Timing and Synchronization Constraints (The Springer International Series in Engineering and Computer Science, 177)
Asynchronous Digital Circuit Design (Workshops in Computing)