Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

High-Level Power Analysis and Optimization

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

Logic Synthesis for Low Power VLSI Designs

Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods

Power Aware Design Methodologies

Low Power Networks-on-Chip

Low Power Design Methodologies (The Springer International Series in Engineering and Computer Science, 336)

Practical Low Power Digital VLSI Design

Low-Power Design and Power-Aware Verification

Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems

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