High Performance Embedded Architectures and Compilers 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings
Description
This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010.
The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.
Keywords
ComputersProgrammingCompilersComputer ArchitectureComputer ScienceData Transmission SystemsElectronic Data InterchangeInformation TechnologyLogic DesignNetworkingLanguagesAlgorithmsHardwareEmbedded Computer SystemsTechnology & Engineering
2010Book
Author(s)HiPEAC 2010 (2010 Pisa, Italy)
PublisherSpringer Science & Business Media
ISBN9783642115141
LanguageEnglish
