Digital Computer Arithmetic Datapath Design Using Verilog HDL

This text presents basic implementation strategies forarithmetic datapath designs and methodologies utilized in the digitalsystem. The author implements various datapath designs for addition, subtraction, multiplication, and division. Theory is presented toillustrate and explain why certain designs are chosen. Eachimplementation is discussed in terms of design choices and howparticular theory is invoked in the hardware.Along with the theory that emphasizes the design in question, Verilogmodules are presented for understanding the basic ideas that accompanyeach design. Structural models are implemented to guarantee correctsynthesis and for incorporation into VLSI schematic-capture programs.From the modules, the reader can easily add or modify existing code tostudy current areas of research in the area of computer arithmetic.The emphasis is on the arithmetic algorithm and not the circuit. Forany design, both algorithmic and circuit trade-offs should be adheredto when a design is under consideration. Therefore, the idea is toimplement each design at the RTL level so that it may be possiblyimplemented in many different ways (i.e. standard-cell orcustom-cell). Thus, professionals, researchers, students, and thosegenerally interested in computer arithmetic can understand howarithmetic datapath elements are designed and implemented.Also included is a CD-ROM which contains the files discussed in thebook. The CD-ROM includes additional files utilized in preparing thedesigns in Verilog including scripts to automatically generate Verilogcode for parallel carry-save and tree multipliers. Each Verilogdesign also contains each module including testbenches to facilitatetesting and verification.