Advanced Gate Stacks for High-Mobility Semiconductors

The continuous miniaturization of information processing and storage units has always been at the heart of advances in modern electronics. A large part of these advances is based on the evolution of bulk CMOS technology. Further progressisinhibitedmainlybypoorscalingofthetransistorgatewhichcauses short channel e?ects and results in overall performance loss. Part of the pr- lem could be ?xed by introducing SOI and/or multiple-gated devices (e. g. , FinFETs, planar double gated, or tri-gated) which results in better elect- static control of the channel. Further improvements could be made by using high mobility materials. In part, this has already been implemented since - bility enhancing strained Si is considered to be an irreplaceable part of next generation devices. By introducing high mobility semiconductors such as g- manium (Ge) or III–V compounds it may be possible to enhance signi?cantly the device performance for future generation nanoelectronics. TodevelopaviableGeMOStechnologyisaverychallengingtask. First,it is necessary to engineer compliant germanium-on-insulator (GeOI) substrates toensurevolumeproductionatlowcost. Second,itisimportanttodevelop- propriate surface passivation methodologies and high-k dielectrics in order to combine good electrical behavior with potential for gate scaling to equivalent oxide thickness less than 1nm. Finally, it is necessary to master Ge processing to fabricate MOSFET devices with high I /I ratio and enhanced chan- ON OFF nelmobilities. Sincethe?rstdemonstrationoffunctionalGepMOSFETswith high-k dielectrics ?ve years ago, there has been a lot of progress in bulk Ge transistors mainly using Si passivating layers and compressive strain which enhance p-channel mobility several times above Si/SiO universal.